SERC

Synopsys

Synopsys provides industry-leading EDA tools and resources for teaching and academic research to numerous universities around the globe. Using Synopsys products in a learning environment provides students with hands-on experience and enables graduates to quickly bring valuable skills to the fast paced world of semiconductor technology. Some of the things one can do using synopsys are:

* Digital ASIC Design
* Digital Integrated Circuits
* Digital Signal Processing
* IC Design
* IC Testing (EPFL)
* IC Testing (SEUA)
* I/O Design
* Modeling and Optimization of VLSI Interconnects
* Modeling and Verification with SystemVerilog
* System-on-Chip Architecture Design
* VLSI Design
* VLSI Design Verification and Testing
* Mixed Signal IC Design
* RF IC Design
* RF Circuits and Systems
* VLSI Device and Process Simulation

Synopsys is available on the LINUX access stations hosted on the first and second floor terminal bays inSERC. It has many modules and the list of modules available at SERC can be viewed using the "Details" tab on the "License_watch" link against "Synopyis" software. The License Watch link is:

URL : http://www.serc.iisc.ernet.in/phplicensewatch/


How to use:

After logging on to any of the linux machines do the follwoing:

   Make sure that you are in the C Shell, then at the prompt enter

             source /home/pkg/lic/vlsitools/synopsys/syn_tool.cshrc

Now the environmetal variables have been set and you can use the synopsys tools. For invocation of any module of synopsys please refer appropriate documentation.

Synopsis Vendor Website: http://www.synopsys.com

For any problems in using the software contact: Mrs. Nalini Sreeshylan (217) or sysadmins at 109. or Dr. Virendra Singh (212).
For further assistance, please contact HelpDesk@SERC by E-mail or phone (#444 within SERC).